Much research has been devoted towards developing Multi-Chip Modules (MCMs) that comprise at least one semiconductor chip (e.g., silicon) bonded to a silicon substrate of which there may be many on a given wafer. In practice, the chips are bonded to the silicon substrate by a process known as "flip-chip" bonding that is commenced by screen printing solder paste on the silicon substrate to coat each bond site on the substrate with paste. The bond sites on the substrate are arranged in patterns, each corresponding to a pattern of bonding pads on each chip of which there are many types, with many different bonding patterns, on each substrate. Thereafter, each chip is placed on the silicon substrate so that its bonding pads contact the corresponding solder paste-coated bond sites on the substrate. The solder paste is then reflowed to yield molten solder that wets and metallurgically bonds each bond site on the substrate to each bonding pad on each chip. Once the chips are bonded to the silicon substrate, the substrate is then diced to create individual subassemblies, referred to as "tiles," that are then packaged.
Typically, each chip is tested prior to placement on the silicon substrate. However, a chip may become defective after placement, or a defective chip may escape detection during testing. Thus, a tile may contain one or more defective chips. Depending on the cost of the chips on the tile, it may be advantageous to remove and replace each defective chip. In practice, when a defective chip is removed, much of the solder bonding that chip to the substrate is also removed, leaving only a small amount of solder on the now-exposed bond sites. The solder remaining on the exposed bond sites is usually insufficient to reliably bond a new bare chip (i.e., a chip whose bonding pads contain no solder). Thus, additional solder must be provided. In the past, solder has been provided by applying solder to the bonding pads of the replacement chip (i.e., "bumping" the bonding pads) rather than by applying solder to the exposed bond sites on the substrate as in the practice described above. Applying solder to the silicon substrate once it has been populated with chips and then diced into tiles is extremely difficult.
Presently, integrated circuit chips are bumped in a batch process of many chips on each silicon wafer. To reduce the cost, the process is carried out on many wafers at one time. In such a process, as described in chapter 6 of the text Microelectronics Packaging Handbook by R. Tummala et al. (Van Nostrand Reinhold 1989), all of the chips are bumped together by first masking each wafer so that only the bonding pads are exposed. Thereafter, a group of elemental metals, comprising a solder alloy, is evaporated onto each wafer to coat the bonding pads exposed through the mask. Then, each wafer is heated in a reducing atmospheres to melt ("reflow") the deposited metals, thereby homogenizing the solder and forming alloy "bumps" on the bonding pads. Subsequently, each wafer is tested, marked and diced into individual chips for sorting and application to the traditional ("C-4-type") flip-chip assembly and/or repair. This process, while effective, can be only economically applied to bumping whole undiced wafers containing may hundreds of chips at a time. Moreover, this process requires the use of costly semiconductor processing equipment which makes the application of this process to the bumping of chips for repair purposes very expensive and impractical when only a small number of bumped chips are needed.
Thus, there is a need for a cost-efficient process for solder bumping the bonding pads of individual semiconductor chips.